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| CXA3329ER Analog Signal Processor TX-IF IC for W-CDMA Cellular Phones Description The CXA3329ER is an analog signal processor TX-IF IC for the W-CDMA cellular phones. This IC contains voltage-controlled gain control amplifier and quadrature modulator. Features * Gain control amplifier with a linear and wide gain variable range * I-Q quadrature modulator * Power saving switch * Low voltage operation (2.7 to 3.3V) * Small package (24-pin VQFN) Applications Analog signal processor TX-IF IC for the W-CDMA cellular phones Structure Bipolar silicon monolithic IC Absolute Maximum Ratings * Supply voltage Vcc * Operating temperature Topr * Storage temperature Tstg Preliminary 24 pin VQFN (Plastic) -0.3 to +5.5 -55 to +125 -65 to +150 V C C Recommended Operating Conditions * Supply voltage Vcc 2.7 to 3.3 * Operating temperature Ta -25 to +85 V C Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. -1- PE00Y17-PS CXA3329ER Block Diagram MODVCC MODGND NC 18 17 NC 16 15 14 13 PS PGND PVCC 19 12 NC VCONT 20 GCA control 1/4 11 GND4 AGCVCC2 21 Switch 1/2 10 Local IN AGCGND2 22 9 NC OUTX 23 8 NC OUT 24 7 Local SW 1 2 3 4 5 6 AGCVCC1 AGCGND1 I IX Q -2- QX CXA3329ER Pin Description Pin No. 1 2 Symbol AGCVCC1 AGCGND1 Typical pin voltage [V] 2.85 0 MODVCC Equivalent circuit Description Positive power supply. Ground. 150 3, 4 5, 6 I, IX Q, QX 3 5 2k 150 1.425 4 6 I, Q inputs. Applies a bias voltage from the external source. MODGND PVCC 30k 7 Frequency division value selection. High: 1/4 frequency division Low: 1/2 frequency division Open: Low 7 Local SW -- PGND 8, 9 NC -- PVCC No connection. 2k 10 10 Local IN -- 50 0.5k 2k Local input. GND4 PGND 11 12 13 14 15 16 GND4 NC PGND PVCC MODGND MODVCC 0 -- 0 2.85 0 2.85 -3- Ground. No connection. Ground. Positive power supply. Ground. Positive power supply. CXA3329ER Pin No. Symbol Typical pin voltage [V] -- Equivalent circuit Description No connection. 17, 18 NC AGCVCC2 40k 19 PS -- 19 Power saving mode switch input. High: Active mode Low: Power saving mode 60k AGCGND2 AGCVCC2 8k 8k 20k 20 VCONT -- 20 Gain control voltage input. 6k 6k AGCGND2 21 22 AGCVCC2 AGCGND2 2.85 0 23 AGCVCC1 24 Positive power supply. Ground. 25 25 890 890 23 24 OUTX OUT -- IF signal differential output. AGCGND1 -4- CXA3329ER Input Conditions for Each Pin Pin No. 3, 4, 5, 6 3, 4, 5, 6 3, 4, 5, 6 7 7 10 10 19 19 20 Item I/Q bias voltage I/Q input voltage I/Q band width Local switch voltage-High Local switch voltage-Low Local frequency Local input level PS voltage-High PS voltage-Low Control voltage range Symbol VBIQ VIQ BWIQ VLSH VLSL fLO LO VPSH VPSL VCN Differential input Conditions Min. 1.35 -- -- 2.5 0 -- -18 2.0 0 0 760 -15 Typ. 1.425 0.4 -- Max. 1.65 1 5 VCC 0.8 -- -12 VCC 0.8 VCC Unit V Vp-p MHz V V MHz dBm V V V -5- CXA3329ER Electrical Characteristics Item DC Characteristics Current consumption 1 Imax Current consumption 2 Imin Power saving current AC Characteristics Output IP3 Output power 1 Output power 2 Gain control range Output noise power 1 I, Q residual sideband product Carrier leak OIP3 PO1 PO2 Gcr No1 Img Note1 VCONT = 2.3V, differential output, f = 380MHz VCONT = 0.3V, differential output, f = 380MHz VCONT = 0.3 to 2.3V, f = 380MHz VCONT = 1.8V, I/Q inputs are no signal. Suppression ratio of desired signal (f = 380 + 1) MHz and image signal (f = 380 - 1) MHz Ratio of desired signal (f = 380 + 1) MHz and local leak (f = 380) MHz Input signal I/Q phase difference -90 when the output signal I/Q phase difference is 90. I/Q input signal level difference when the output signal I/Q levels are the same. B B B B B B 8.5 -19 -15 -11 dBm -83 -77 -73 54 -- -- 62 -- -- 70 dB dBm Ips VCONT = 2.85V VCONT = 0V PS = low (in power saving mode) A A A -- 24 17 -- 5 A mA Symbol Conditions Measurement Min. Typ. Max. point Unit -147 dBm/ Hz -25 dBc CL B -- -- -18 Input I/Q phase error IQPE B -3 0 3 deg Input I/Q gain error IQGE B -2.5 0 2.5 dB * Unless otherwise specified, the I/Q baseband input signals and local input signal use the conditions shown in the Electrical Characteristics Measurement Circuit and the control voltage and power saving pins are set to VCONT = 2.3V, PS = high. The local switching pin is left open (1/2 frequency division). * IF output impedance is 1k. * Values measured with a Sony evaluation board. Note1) Set the control voltage so that the output power becomes -15dBm under the conditions shown in the Electrical Characteristics Measurement Circuit. Input the two tone signals of 570kHz, 200mVp-p and 630kHz, 200mVp-p to I-IX; and also input to Q-QX the two tone signals whose phases are deviated by 90 degrees from those signals. The ratio of the desired component and the 3rd order harmonic component of the outputs resulted from the above is measured, and the power level that is made by adding the half ratio to the desired component power level is labeled as the output IP3. See the figure on the next page. -6- CXA3329ER Output level S OIP3 = S + (S - IM3)/2 A IM3 Frequency f0 + 510kHz f0 + 570kHz f0 + 630kHz f0 + 690kHz -7- CXA3329ER Electrical Characteristics Measurement Circuit 1 1 A Vcc Power save Active 18 17 16 1n 15 14 1n 13 MODGND MODVCC 19 PS PGND NC 12 GND4 11 1n Local IN 10 fLO = 760MHz -15dBm Local signal input NC 20 VCONT 1k 21 AGCVCC2 1n 22n1 2 1n OUTPUT B 22n1 23 OUTX 1 22 AGCGND2 PVCC NC NC 9 NC 8 1/4 frequency division AGCVCC1 1n 24 OUT AGCGND1 Local SW 7 1/2 frequency division 1 1 2 3 4 5 QX 6 IX Q I 10k 1/2 x Vcc 10k 10k 1n 1 1 1 1 10k cos (2f) f = 1MHz 400mVp-p Gain = 1 sin (2f) f = 1MHz 400mVp-p Gain = 1 Baseband signal input 1 Murata, Inc. LQN21A22NJ (K) 04 2 TOKO, Inc. B5FL 616DS-1135 -8- CXA3329ER Application Circuit Vcc 1 Power save Active 1 18 NC 17 NC 16 MODVCC 1n 15 MODGND 14 PVCC 1n 13 PGND 19 PS NC 12 20 VCONT 1k GND4 11 1n 21 AGCVCC2 1n 23 OUTX 1n 1n AGCVCC1 AGCGND1 Local IN 10 Local signal 1 22 AGCGND2 NC 9 NC 8 1/4 frequency division 1/2 frequency division 24 OUT Local SW QX IX Q I 7 1 1 2 3 4 5 6 10k 1/2 x Vcc 10k 10k 1n 1 1 1 1 10k Baseband signal Adjust these values so that the impedance matching with this IC is optimum. Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same. -9- CXA3329ER Description of Operation 1. Outline of operation This IC performs the signal processing between the analog transmit baseband processor block and the analog transmit RF processor block of the cellular phone. The figure below shows the general circuit block diagram for the portable cellular phones using this IC. The input for this IC is connected to the baseband signal processor block; the output is connected to the analog RF processor block. CXA3328TN RF receive/ transmit processor Baseband signal processor CXA3329ER 2. IC Internal Signal Flow Two baseband-processed signals I, Q and the local signal are input to this IC as shown in the figure below. The local signal is 1/2-frequency divided, and that signal becomes the quadrature I/Q local signal. The baseband I/Q signals are input to the quadrature modulatar, and baseband processing to IF upconversion is performed with the quadrature local signals. The signal is input to the gain control amplifier, and output after the gain controlled to the necessary level. I/IX OUT/OUTX Q/QX -90 Local 1/2 div (1/4 div) 0 - 10 - CXA3329ER Notes on Operation 1. Baseband signal I/Q input Pins 3 to 6, where the baseband signal is input, do not have a determined voltage internally on the IC. Therefore, a bias voltage equivalent to 1/2VCC should be applied externally. 2. IF signal output The IF signal outputs, OUT/OUTX, are differential outputs. The output impedance should be 1k including the external resistance with differential. Also, it is necessary to connect the inductor to eliminate the parasitic capacitance in the IC. 3. Notes on power supplies The CXA3329ER is designed to operate by a 2.85V stabilized power supply to allow use with the battery driven portable phones. Using the multiple voltage regulators throughout the phone is recommended to minimize the power supply noise in the CXA3329ER power supply unit. The recommended power supply range for the CXA3329ER is from 2.7V to 3.3V. Decouple the power supplies around the CXA3329ER using 1F capacitor for each VCC pin. Locate this capacitor as close to the pins as possible to minimize the series inductance. Using an additional 1nF decoupling capacitor in parallel to the 1F capacitor is recommended to further reduce the high frequency noise in the power supply input to the CXA3329ER. - 11 - CXA3329ER Design Materials (Design Guarantee) Electrical Characteristics Item DC Characteristics Current consumption 1 Imax Current consumption 2 Imin Power saving current AC Characteristics Output IP3 Output power 1 Output power 2 Gain control range Gain accuracy Gain flatness Output noise power 1 Output noise power 2 I, Q residual sideband product Carrier leak OIP3 PO1 PO2 Gcr Gct Gflat No1 No2 Img Note1 (See page 6.) VCONT = 2.3V, differential output, f = 380MHz VCONT = 0.3V, differential output, f = 380MHz VCONT = 0.3 to 2.3V, f = 380MHz Difference between the output powers where Ta = -25C, 85C and Ta = 27C IF 2.5MHz PO = -25dB, I/Q inputs are no signal. PO = -65dBm, I/Q inputs are no signal. Suppression ratio of desired signal (f = 380 + 1) MHz and image signal (f = 380 - 1) MHz Ratio of desired signal (f = 380 + 1) MHz and local leak (f = 380) MHz Input signal I/Q phase difference -90 when the output signal I/Q phase difference is 90. I/Q input signal level difference when output signal I/Q levels are the same. Until output rise of 90% after the power is turned ON. B B B B B B B B B 8.5 -- -- -11 dBm -83 -77 54 -2 62 0 -73 70 2 0.25 -147 -162 -25 dBc B -- -- -18 dB dB dB dBm/ Hz dBm Ips VCONT = 2.85V VCONT = 0V PS = low (in power saving mode) A A A -- 24 17 -- 5 A mA Symbol Conditions (VCC = 2.7 to 3.8V, Ta = -25 to +85C) Measurement Min. Typ. Max. point Unit -19 -15 -0.25 0 -- -- -- -- -- -- CL Input I/Q phase error IQPE B -3 0 3 deg Input I/Q gain error IQGE B B B -2.5 -- -- 0 -- -- 2.5 3 10 dB % s Error vector magnitude EVM Response time Tr * Unless otherwise specified, the I/Q baseband input signals and local input signal use the conditions shown in the Electrical Characteristics Measurement Circuit and the control voltage and power saving pins are set to VCONT = 2.3V, PS = high. The local switching pin is left open (1/2 frequency division). * IF output impedance is 1k. * Values measured with a Sony evaluation board. - 12 - CXA3329ER Design Materials (Design Guarantee) Item Input Impedance I/Q input resistance I/Q input capacitance VCONT pin input resistance Local IN input resistance RIQ CIQ RVC RL Single Single 3, 4, 5, 6 3, 4, 5, 6 20 10 60 -- 10 85 -- -- -- 10 -- 62.5 k pF k Symbol Conditions Measurement Min. Typ. Max. point Unit 37.5 50 - 13 - CXA3329ER Package Outline Unit: mm 24PIN VQFN(PLASTIC) 4.0 3.6 C 13 0.7 0.9 0.1 0.6 0.1 0.05 S 18 19 A 12 B 78 4. 9) .3 (0 PIN 1 INDEX 24 7 1 6 0.4 x4 0.1 S A-B C x4 0.1 S A-B C 0.225 0.03 45 0. 6 S C 0.05 M S A-B C 0.03 0.03 (1) (Stand Off) 0.2 0.01 Solder Plating 0.13 0.025 + 0.09 0.14 - 0.03 TERMINAL SECTION PACKAGE STRUCTURE PACKAGE MATERIAL SONY CODE EIAJ CODE JEDEC CODE VQFN-24P-03 LEAD TREATMENT LEAD MATERIAL PACKAGE MASS EPOXY RESIN SOLDER PLATING COPPER ALLOY 0.04g (0 .1 1.0 5) - 14 - Sony Corporation |
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